Open Access Journal

ISSN : 2394-2320 (Online)

International Journal of Engineering Research in Computer Science and Engineering (IJERCSE)

Monthly Journal for Computer Science and Engineering

Open Access Journal

International Journal of Engineering Research in Computer Science and Engineering (IJERCSE)

Monthly Journal for Computer Science and Engineering

ISSN : 2394-2320 (Online)

Synthesis of Sliding Window Protocol with Piggybacking

Author : Neha Jain 1 Dr. Manoj Kumar Jain 2

Date of Publication :27th December 2017

Abstract: Data traffic on the communication channel is increasing day by day. To increase the utilization of the bandwidth of the communication channel we implement sliding window protocol with the concept of piggybacking on hardware. Much work has been done in this field but in this paper, we implement the concept of the sliding window with piggybacking. To implement the algorithm on hardware we use a hardware description language like VHDL. We implemented it on Xilinx ISE. Total memory usage of this implementation is 267108 kilobytes.

Reference :

  1. 1. J. Ding, Y Shao, D. Zhang “Development of A Sliding Window Protocol for Data Synchronization in a Flow Cytometer,” The 26th International Conference on Software Engineering and Knowledge Engineering, Hyatt Regency, Vancouver, BC, Canada, pp. 626-631, January 2014.

    2. N. Nedjah, M. Mourelle, “High-Performance Hardware of the Sliding-Window Method for Parallel Computation of Modular Exponentiations,” International Journal of Parallel Programming, vol. 37, pp. 537-555, December 2009.

    3. O.Drogehorn, H. Hummer, W. Geisselhardt,”Formal Specification and Verification of Transfer-protocols for system

    4. A. Kind, R. Pletka, M. Waldvogel “The Role of Network Processors in Active Networks, IFIP International Working Conference on Active Networks, pp. 20-31, 2003.

    5. S. Govind, R. Govindarajan, J. Kuri,”Packet Reordering in Network Processors,” Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International, June 2007.

    6. S. Ata., M. Murata, H. Miyahara, “Analysis of network traffic and its application to design of high-speed routers”, IEICE Transactions on Information and systems, pp. 988-995, 2000.

    7. J. Fu, O. Hagsand, “Designing and Evaluating Network Processor Applications", In Proc. of 2005 IEEE Workshop on High Performance Switching and Routing (HPSR) Hong Kong, pp. 142-146, 2005.

    8. A. Kind, R. Pletka, M. Waldvogel.,” The Role of Network Processors in Active Networks”, International Federation for Information Processing, pp. 20–31, 2004.


Recent Article