International Journal of Engineering Research in Computer Science and Engineering (IJERCSE)

A Survey on CORDIC algorithm and its Implementation

Author : Richa Sharma ¹ PoojaThakre ²

Date of Publication :19th June 2018

Abstract: COordinate Rotation DIgital Computer(CORDIC) is an uncomplicated and efficient algorithm for performing mathematical tasks such as the calculation of trigonometric, hyperbolic and logarithmic functions, real and complex multiplications, division, square-root and many more using simple add, subtract and shift operations. Rectangular to polar conversion is an imperative operation in ALU, DSP processors, wireless communication, multimedia etc. To achieve this conversion there is a need of squaring, square root and arctangent circuits, which make it complex with the high area and power requirement. To compensate this, rectangular to polar conversion is carried out using CORDIC architecture. This paper presents a survey on pipelined CORDIC architecture for rectangular to polar conversion.

Reference :

1. J. E. Volder, “The CORDIC trigonometric computing technique,” IRE Trans. Electronic Computing, vol. EC-8, pp. 330–334, Sep. 1959.
2. Sudhakar Reddy.P , Ramachandra Reddy “ASIC Implementation of Autocorrelation and CORDIC Algorithm for OFDM Based WLAN”, ISSN 1450-216X Vol.27 No.4 (2009), pp.588-596
3. C.-S. Wu, A.-Y. Wu, and C.-H. Lin, “A highperformance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes,” IEEE Trans. Circuits Syst. II, vol. 50, no. 9, pp. 589–601, Sep. 2003.
4. R. Shukla and K. Ray, “Low latency hybrid CORDIC algorithm,” IEEE Trans. Comput., vol. 63, no. 12, pp. 3066–3078, Dec 2014.
5. C.-S. Wu and A.-Y. Wu, “Modified vector rotational CORDIC (MVR-CORDIC) algorithm and architecture,” IEEE Trans. Circuits Syst. II, vol. 48, no. 6, pp. 548–561, Jun. 2001.
6. S. Aggarwal, P. K. Meher, and K. Khare, “Areatime efficient scaling-free CORDIC using generalized micro-rotation selection,” IEEE Trans. VLSI Syst., vol. 20, no. 8, pp. 1542–1546, Aug. 2012.
7. F. Jaime, M. Sánchez, J. Hormigo, J. Villalba, and E. Zapata, “Enhanced scaling-free CORDIC,” IEEE Trans. Circuits Syst. I, vol. 57, no. 7, pp. 1654–1662, July 2010.
8. Y. Liu, L. Fan, and T. Ma, “A modified CORDIC FPGA implementation for wave generation,” Circuits Syst. Signal Process., vol. 33, no. 1, pp. 321–329, 2014.
9. Concept, Design, and Implementation of Reconfigurable CORDIC Supriya Aggarwal, Pramod K. Meher, and Kavita Khare IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 2016.
10. Implementation of a Fast Hybrid CORDIC Architecture Bhawna Tiwari, Nidhi Goel 2016 Second International Conference on Computational Intelligence & Communication Technology IEEE 2016.
11. CORDIC-based FFT Real-time Processing Design and FPGA Implementation Aimei Tang*, Li Yu, Fangjian Han, Zhiqiang Zhang, 2016 IEEE 12th International Colloquium on Signal Processing & its Applications (CSPA2016), 4 - 6 March 2016, Melaka, Malaysia.
12. CORDIC II: A New Improved CORDIC Algorithm Mario Garrido, Member, IEEE, Petter Källström, Martin Kumm and Oscar Gustafsson, Senior Member, IEEE Ieee Transactions On Circuits And Systems Part Ii: Express Briefs 2016.