1. 1. P. Neužil, C. D. M. Campos, C. C. Wong, J. B. W. Soon, J. Reboud, and A. Manz, “From chip-in-a-lab to lab-on-a-chip: Towards a single handheld electronic system for multiple application-specific lab-on-a-chip (ASLOC),” Lab Chip, 2014, doi: 10.1039/c4lc00310a
   2. M. Baker, “Tissue models: A living system on a chip,” Nature, 2011, doi: 10.1038/471661a.
   3. H. Javaid and S. Parameswaran, Pipelined multiprocessor system-on-chip for multimedia, vol. 9783319011134. 2013.
   4. S. Prasad, Y. Yadav, V. Kunduru, M. Bothara, and S. Muthukumar, “Lab-on-achip,” in Handbook of Physics in Medicine and Biology, 2010.
   5. G. Chen, D. Sylvester, D. Blaauw, and T. Mudge, “Yield-driven near-threshold SRAM design,” IEEE Trans. Very Large Scale Integr. Syst., 2010, doi: 10.1109/TVLSI.2009.2025766.
   6. R. W. Hamming, “Error detecting and error correcting codes,” in Computer Arithmetic: Volume II, 2015.
   7. D. Kythe and P. Kythe, “Hamming Codes,” in Algebraic and Stochastic Coding Theory, 2017.
   8. X. Wei et al., “Development of a radiationhardened SRAM with EDAC algorithm for fast readout CMOS pixel sensors for charged particle tracking,” J. Instrum., 2014, doi: 10.1088/1748- 0221/9/08/P08001.
   9. ARM Limited, “ARM Processor Architecture,” ARM Archit. Digit. World, 2013.
   10. P. Acheson, C. Dagli, and N. Kilicay Ergin, “Model based systems engineering for system of systems using agent-based modeling,” 2013, doi: 10.1016/j.procs.2013.01.002.